It’s real: https://truthsocial.com/@realDonaldTrump/posts/117169869880912506

I thought 32GiB would be enough coming from 16, but nope, I found a new use case where it’s too little.
Originally, I wanted to be able to run at least 2 VMs with 8GiB assigned at once.
But the new use case is a 4GiB RAM VM with 20GiB virtual disk stored in RAM (TMPFS). And that’s not all that much.

I’ve also just been using it for random temporary things, as I am still paranoid about SSD wear. If I need to download an ISO just to burn it, there’s no need to take, say, 3GiB from the SSD’s lifespan, no matter how small that may seem.

But even if not used explicitly, it’s still pretty useful for disk I/O cache. Especially with slow things like memory cards. At least for reading, for writing it’s just annoying because I have no idea how much has already transferred, and neither can I safely stop it.

Could be a huge Tesla coil.

I mean, companies are looking for the 10+ years of experience 20 year old unicorn…

But you can still run both at once. RP2350 datasheet

From section 3.9 Arm/RISC-V architecture switching:

There are two processor sockets on RP2350, referred to as core 0 and core 1 throughout this document. Each socket can be occupied either by a Cortex-M33 processor (implementing the Armv8-M Main architecture, plus extensions) or by a Hazard3 processor (implementing the RV32IMAC architecture, plus extensions).

From section 3.9.2. Mixed architecture combinations:

The ARCHSEL register has one bit for each processor socket, so it is possible to request mixed combinations of Arm and RISC-V processors: either Arm core 0 and RISC-V core 1, or RISC-V core 0 and Arm core 1.

Practical applications for this are limited, since this requires two separate program images. The two cores interoperate normally, including shared exclusives via the global monitor: a shared variable can be safely, concurrently accessed by an Arm processor performing ldrex, strex instructions and a RISC-V processor performing amoadd.w instructions, for example

Yeah, RP2350 in Raspberry Pi Pico 2 also has 2 ARM cores and 2 RISC-V cores.

Which reminds me, I purchased one a month ago to play around with as it has good documentation, yet I haven’t used it once so far.

Extending lifespan of the buttons.